Integrated circuits are often designed to incorporate scan test circuitry that facilitates testing for various internal fault conditions. Such scan test circuitry typically comprises scan chains comprising multiple scan cells. The scan cells may be implemented, by way of example, utilizing respective flip-flops. The scan cells of a given scan chain are configurable to form a serial shift register for applying test patterns at inputs to combinational logic of the integrated circuit. The scan cells of the given scan chain are also used to capture outputs from other combinational logic of the integrated circuit.
Scan testing of an integrated circuit may therefore be viewed as being performed in two repeating phases, namely, a scan shift phase in which the flip-flops of the scan chain are configured as a serial shift register for shifting in and shifting out of test patterns, and a scan capture phase in which the flip-flops of the scan chain capture combinational logic outputs. These two repeating scan test phases may be collectively referred to herein as a scan test mode of operation of the integrated circuit, or as simply a scan mode of operation. Outside of the scan test mode and its scan shift and scan capture phases, the integrated circuit may be said to be in a functional mode of operation. Other definitions of the scan test and functional operating modes may also be used.
When an integrated circuit is placed in its scan mode of operation, signals are applied to primary inputs of the integrated circuit and outputs are observed at primary outputs of the integrated circuit. These primary inputs and primary outputs may be associated with respective signal pads that are bidirectional in the functional mode of operation. However, these signal pads lose their ability to operate in a bidirectional manner when the integrated circuit is configured in the scan mode of operation, because proper operation of the scan mode requires the corresponding primary inputs and primary outputs to be unidirectional. This is problematic in that certain input and output functional paths of the integrated circuit will remain untested during the scan mode of operation. For example, an input functional path associated with a primary output may remain untested, and an output functional path associated with a primary input may remain untested.